PowerPC Architecture (Deutsch)/(English)

Course Description

This course covers the necessary basics of the complete PowerPC architecture and discusses the common features like programming models, exceptions, caches within the PowerPC family. This includes register and data structures as well as MMUs. Another topic is assembler basics. Discussions of multiprocessor synchronization and PowerOpen ABI are also included.

The variety of the different controllers in this family is big. This allows us to do exercises on a theoretical base only.

Course Content

  • PowerPC history
  • General characteristics
  • Register complement
  • User and supervisor modes
  • Data types
  • Little/Big endian layouts
  • Basics of assembler programming
  • Exceptions
  • Classes
  • Types
  • Handlers
  • Reset behaviors
  • Cache
  • Memory Management Unit (MMU)
  • Synchronizing commands
  • Synchronizing in PowerOpen: ABI
  • Register use
  • PowerPC variants
  • Internet resources

Prerequisites

A common knowledge about microprocessor architecture is necessary. Any knowledge about assembler language is also helpful.

Target Group

Hardware and Software developers who want to use the PowerPC and who require a detailed knowledge of the structure, function, and uses of the chips.

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